So this project started out with a dream of making my own CPU (even simulated) on a modern architecture.
In university, I had made a simulated CPU built on the MIT Beta microarchitecture. You can view that ISA here. This was a very rewarding experience, but I was left itching to make a CPU built on a modern, fully-functional, frequently used ISA.
When I first envisioned this project, ARM was the only other option besides x86, and while ARM would be easier to get a hold of, it is still protected by royalties.
However, RISC-V has quickly been gaining momentum in recent years and is prepared to make a full breakout as an open-source, fully supported ISA. Having everything align like this, I wanted to take the chance to make my own RISC-V CPU.
My goal will be to first make a simple, minimum viable product that just runs the ISA. I will probably start with a subsection of the architecture and build it on a breadboard for kicks. Then, I will expand it into a full 32-bit or maybe even 64-bit RISC-V CPU built in real simulation software.
Following this, I will do my best to venture into some basic optimization steps for my own learning. That is, popular tricks which increase the IPC of the CPU core.
1/3/2023: Made a full BoM for the breadboard CPU. Download it here. While I use LibreOffice, I've exported it as an Excel spreadsheet for your compatibility :P Credit to Ben Eater whose 8-bit breadboard computer kit this is based on.